February 23, 2007
I basically spent the last couple weeks just working on fixing things in the core emulation. The next release after 0.9.0b1 has some new features including:
- Full-fledged exceptions. Previously there were a number of places TLB and other exceptions couldn't occur, including delay slots. This has been overhauled and all exceptions can now occur anywhere anytime.
- Special handling for a delay slot that resides on a separate code page. The MIPS r4300 TLB can map pages of memory as small as 4kb. A problem comes up if the delay slot exists on a separate page from the branch instruction it's paired with AND the page it is on is not currently mapped by the TLB. You might think this would never happen. At a peak of 90 million instructions per second, it happens more often than you might think.
The new core also has lots of fixes including:
- Bug fixes for the Intel recompiler instructions: ldr, ldl, sdl, sdr, syscall
- Bug fixes for the PowerPC recompiler instructions: sdl, sdr
- Bug fixes and new instructions implemented in the DSP recompiler for Intel and PowerPC.
- A massive bug that was causing the recompiled code cache to execute stale code. This was causing emulated crashes that took a long time to track down, but this alone has bumped compatibility up all over the place.
So the big question is: If all this is such a huge improvment, why hasn't it been released yet?
- Some of the fixes currently only exist in the PowerPC or Intel core, and need to be brought over to the other side. (For ex: There is at least one game freezing on the PowerPC that runs fine with the Intel recompiler.)
- The current code cache bug fix, plus the new exceptions have hurt speed quite a bit. Luckily, these are both very fixeble problems and I expect to get the speed back to where the previous release was, but it's going to take a bit more work.
The good news is, I can tell you without a doubt the next release is going to have the highest core compatibility sixtyforce has ever seen!